// Query the current memory size, and increase the current memory size.
// Note that memory.size is not IntrNoMem because it must be sequenced with
// respect to memory.grow calls.
-def int_wasm_memory_size : Intrinsic<[llvm_anyint_ty],
+def int_wasm_memory_size : DefaultAttrsIntrinsic<[llvm_anyint_ty],
[llvm_i32_ty],
[IntrReadMem]>;
-def int_wasm_memory_grow : Intrinsic<[llvm_anyint_ty],
+def int_wasm_memory_grow : DefaultAttrsIntrinsic<[llvm_anyint_ty],
[llvm_i32_ty, LLVMMatchType<0>],
[]>;
// Saturating float-to-int conversions
//===----------------------------------------------------------------------===//
-def int_wasm_trunc_saturate_signed : Intrinsic<[llvm_anyint_ty],
+def int_wasm_trunc_saturate_signed : DefaultAttrsIntrinsic<[llvm_anyint_ty],
[llvm_anyfloat_ty],
[IntrNoMem, IntrSpeculatable]>;
-def int_wasm_trunc_saturate_unsigned : Intrinsic<[llvm_anyint_ty],
+def int_wasm_trunc_saturate_unsigned : DefaultAttrsIntrinsic<[llvm_anyint_ty],
[llvm_anyfloat_ty],
[IntrNoMem, IntrSpeculatable]>;
// Since wasm does not use landingpad instructions, these instructions return
// exception pointer and selector values until we lower them in WasmEHPrepare.
-def int_wasm_get_exception : Intrinsic<[llvm_ptr_ty], [llvm_token_ty],
+def int_wasm_get_exception : DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_token_ty],
[IntrHasSideEffects]>;
-def int_wasm_get_ehselector : Intrinsic<[llvm_i32_ty], [llvm_token_ty],
+def int_wasm_get_ehselector : DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_token_ty],
[IntrHasSideEffects]>;
// wasm.catch returns the pointer to the exception object caught by wasm 'catch'
// instruction. This returns a single pointer, which is sufficient for C++
// support. The immediate argument is an index to for a tag, which is 0 for C++.
-def int_wasm_catch : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty],
+def int_wasm_catch : DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_i32_ty],
[IntrHasSideEffects, ImmArg<ArgIndex<0>>]>;
// WebAssembly EH must maintain the landingpads in the order assigned to them
// by WasmEHPrepare pass to generate landingpad table in EHStreamer. This is
// used in order to give them the indices in WasmEHPrepare.
-def int_wasm_landingpad_index: Intrinsic<[], [llvm_token_ty, llvm_i32_ty],
+def int_wasm_landingpad_index: DefaultAttrsIntrinsic<[], [llvm_token_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<1>>]>;
// Returns LSDA address of the current function.
-def int_wasm_lsda : Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
+def int_wasm_lsda : DefaultAttrsIntrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
//===----------------------------------------------------------------------===//
// Atomic intrinsics
//===----------------------------------------------------------------------===//
def int_wasm_swizzle :
- Intrinsic<[llvm_v16i8_ty],
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty],
[llvm_v16i8_ty, llvm_v16i8_ty],
[IntrNoMem, IntrSpeculatable]>;
def int_wasm_shuffle :
- Intrinsic<[llvm_v16i8_ty],
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty],
[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
[IntrNoMem, IntrSpeculatable]>;
def int_wasm_sub_sat_signed :
- Intrinsic<[llvm_anyvector_ty],
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>],
[IntrNoMem, IntrSpeculatable]>;
def int_wasm_sub_sat_unsigned :
- Intrinsic<[llvm_anyvector_ty],
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>],
[IntrNoMem, IntrSpeculatable]>;
def int_wasm_avgr_unsigned :
- Intrinsic<[llvm_anyvector_ty],
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>],
[IntrNoMem, IntrSpeculatable]>;
def int_wasm_bitselect :
- Intrinsic<[llvm_anyvector_ty],
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
[IntrNoMem, IntrSpeculatable]>;
def int_wasm_anytrue :
- Intrinsic<[llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_i32_ty],
[llvm_anyvector_ty],
[IntrNoMem, IntrSpeculatable]>;
def int_wasm_alltrue :
- Intrinsic<[llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_i32_ty],
[llvm_anyvector_ty],
[IntrNoMem, IntrSpeculatable]>;
def int_wasm_bitmask :
- Intrinsic<[llvm_i32_ty],
+ DefaultAttrsIntrinsic<[llvm_i32_ty],
[llvm_anyvector_ty],
[IntrNoMem, IntrSpeculatable]>;
def int_wasm_dot :
- Intrinsic<[llvm_v4i32_ty],
+ DefaultAttrsIntrinsic<[llvm_v4i32_ty],
[llvm_v8i16_ty, llvm_v8i16_ty],
[IntrNoMem, IntrSpeculatable]>;
def int_wasm_narrow_signed :
- Intrinsic<[llvm_anyvector_ty],
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[llvm_anyvector_ty, LLVMMatchType<1>],
[IntrNoMem, IntrSpeculatable]>;
def int_wasm_narrow_unsigned :
- Intrinsic<[llvm_anyvector_ty],
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[llvm_anyvector_ty, LLVMMatchType<1>],
[IntrNoMem, IntrSpeculatable]>;
def int_wasm_q15mulr_sat_signed :
- Intrinsic<[llvm_v8i16_ty],
+ DefaultAttrsIntrinsic<[llvm_v8i16_ty],
[llvm_v8i16_ty, llvm_v8i16_ty],
[IntrNoMem, IntrSpeculatable]>;
def int_wasm_extadd_pairwise_signed :
- Intrinsic<[llvm_anyvector_ty],
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMSubdivide2VectorType<0>],
[IntrNoMem, IntrSpeculatable]>;
def int_wasm_extadd_pairwise_unsigned :
- Intrinsic<[llvm_anyvector_ty],
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMSubdivide2VectorType<0>],
[IntrNoMem, IntrSpeculatable]>;
//===----------------------------------------------------------------------===//
def int_wasm_tls_size :
- Intrinsic<[llvm_anyint_ty],
+ DefaultAttrsIntrinsic<[llvm_anyint_ty],
[],
[IntrNoMem, IntrSpeculatable]>;
def int_wasm_tls_align :
- Intrinsic<[llvm_anyint_ty],
+ DefaultAttrsIntrinsic<[llvm_anyint_ty],
[],
[IntrNoMem, IntrSpeculatable]>;
def int_wasm_tls_base :
- Intrinsic<[llvm_ptr_ty],
+ DefaultAttrsIntrinsic<[llvm_ptr_ty],
[],
[IntrReadMem]>;